Assignment title: Information
Question
Electrical design and anylasis
Q
Design a logic interface circuit to allow the connection of data from either of the two specific
logic gates shown (one TTL and one CMOS), to either of two other specific logic gates (TTL
and CMOS) as shown in the sketch.
Specifications
1. Five volt power supplies are used on both source and destination circuits.
2. The signal must not be inverted in passing through the interface. (It may of course be
inverted within the interface, but must emerge the same as it went in.)
3. The interface is to contain an LED (with current between 5mA and 10mA) to indicate the
state of the data (at point X), as well as any extra gates (of any type) needed to provide the
interface function. (Use gates only, not transistors.)
4. The interface must be properly designed to ensure that it takes into account the worst
case specifications of the logic gates involved. D.C. design only is required.
Steps
1. Assemble the relevant worst case data on all gates and organise in a table of the
following form, using data @ 25°C.
Gate VOH IOH VOL IOL VIH I
IH VIL I
IL
74HC00 – – – –
74S02 – – – –
4001 – – – –
74LS00 – – – –6 ELE2504 – Electronic design and analysis
© University of Southern Queensland
2. Design the circuit by carefully considering each possible position of the switches, both
voltage and current and both high and low states, and choosing a combination of gates to
form the interface circuit.
Report
Submit a report containing at least the following:
1. Data for the gates in a table as above. (Data sheets at the end of this book.)
2. For the simple case of the interface being a direct connection, give clear consideration of
each possible combination of gates and logic levels, and identification of any problems.
Give reasons.
3. Your solution to the problems, including a sketch of the interface circuit and justification
of any resistor values.