1007ICT / 7611ICT Computer Systems and Networks Assignment – Semester 1 , 201 7 1 Due Date: 5pm Friday , 12 May 201 7 Software requirement: You must use the Logisim simulator to create your circuits. Assignments submitted using other programs will NOT BE ABLE TO BE MARKED due to incompatible file formats . Submission instructions: You will be required to submit only t wo files electronically using learning @ griffith. The two files will be a digital logic simulator circuit (created using the Logisim simulator) and a written report ( PDF format only ) as described in the text below. You are to submit these files electronically to the learning @ griffith site for this course. Full instructions including a link for submitting your assignment will be made available in the same place where you downloaded this assignment. Important: F ilen ames for both your files must be prefixed with your student number, an underscore character , first name, an underscore character, last name, underscore character and then the name of the file . PLEASE DO NOT SUBMIT ZIP (or other) ARCHIVES as they may not be able to be marked. Eg. Your Logisim file would be named: s123456_ First N ame _ Last N ame _Logic_Circuit.circ Your Written Report file would be named: s123456_ First N ame _ Last N ame _Report. pdf Files with filenames that do not adhere to this requirement may NOT be marked or may attract a mark penalty. 1007ICT / 7611ICT Computer Systems and Networks Assignment – Semester 1 , 201 7 2 Individual Assignment This is an individual assignment. All work submitted must be your own work. As per the warning given in the first lecture, be careful not to use the work of others as your own nor have others use your work as their own. The assignment will be marked out of 100. Marks will be allocated according to the following tabl e: Interview - n ote: The in - person explanation of how the circuit works will be a short (about 5 minute ) informal interview between you and your workshop demonstrator. During this interview you will demonstrate your circuit and convey your understanding of all aspects of the complete d circuit . This interview will be held in your workshop in W eek 1 2 and will also serve as a way to receive individual feedback on your work. Task Description: You are to build (and test) the following digital logic ci rcuit in the Logisim simulator and write a short report that describes your circuit. The maximum mark that you are able to achieve on the assignment will be determined by the difficulty of the circuit you decide to build (Option 1 or Option 2, see below ) . Circuit Options: Circuit Di fficulty rating (max mark) OPTION1: Part A only 35 OPTION2: Part A and Part B 6 0 Aspect Maximum mark Circuit (7 0 marks ) Difficulty 35 or 60 (See task description) Use of templates /subcircuits 5 Neatness 5 Report (20 marks ) Accuracy 1 0 Completeness 5 Neatness, appropriate use of language and layout 5 In - p erson interview to explain how the circuit works (10 marks ) (see interview - note below ) Accuracy 10 Total 100 1007ICT / 7611ICT Computer Systems and Networks Assignment – Semester 1 , 201 7 5 For this assignment, Card 2 (C2) will be represented by three inputs (3 bits) . The three C2 inputs are named as C2 - 1, C2 - 2 , and C2 - 3. The table below shows the assignment of bits to each C2 value for C2 - 1, C2 - 2, and C2 - 3 . C2 Inputs Part A Circuit Option 1: Part A Only (35 marks): The implementation for this part must use only the three basic logic gates (AND, OR, NOT) with maximum 2 inputs . You are required to implement a circuit wher e the user (you) can input a value for Card 1 (C1) value (C1 - 1, C1 - 2, and C1 - 3) and a Card 2 (C2) value ( C2 - 1, C2 - 2, and C2 - 3) and the circuit decodes the C1 - 1, C1 - 2, C1 - 3 and C2 - 1, C2 - 2 , C2 - 3 values using a dec oder (see lecture notes) as well as other permitted logic gates to determine if the C1 + C2 < 7 . The output will be a single LE D labelled WINNER which is lit if the C1 + C2 < 7, and is not lit if the C1 + C2 > 6 . Part B Circuit Option 2: Part A and Part B (60 marks): For this part, the player plays a number of games until a certain number ( N ) of wins or losses is reached. The number N range s from 1 to 7 and must be set via a combination of three separate inputs: N1 , N2 , and N3 . An N value of 0 is not allowed and the game state is undefined for this case. This means that you will have to set N to be non - zero (1..7) before starting the game. Note: In Logisim, y ou can combine the 3 inputs for N into a single 3 bit input. Using the sa me circuit as Part A , add additional circuitry to count how many games have been won and lost . Each time a game is won, add 1 to the number of wins and reduce the number of losses by 1 . Each time a game is lost, add 1 to the number of losses and reduce the number of wins by 1. If the number of wins, reaches N , the game is won completely and an OVERALL_WINNER LED is lit. If the number of losses, reaches N , the game is lost completely and an OVERALL_LOSER LED is l it. It is not possible to have both the OVERALL_WINNER and OVERALL_LOSER LEDs lit at the same time. It is however possible to have both OVERALL_WINNER and OVERALL_LOSER LEDs off at the same time. C2 value C2 - 1 C2 - 2 C2 - 3 0 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 1007ICT / 7611ICT Computer Systems and Networks Assignment – Semester 1 , 201 7 6 Overall winner : If the number of wins is equal to N (the total number of games that need to be won or lost) then an LED labelled OVERALL_WINNER is lit, and the circuit is permanent ly locked. No matter the changes to the input after this happens, the OVERALL_WINNER LED will stay lit and the OVER ALL_LOSER LED will remain unlit. Overall loser: If the number of losses is equal to N (the total number of games that need to be won or lost) then an LED labelled OVERALL_LOSER is lit, and the circuit is permanent ly locked. No matter the changes to the input after this happens, the OVERALL_LOSER LED will stay lit and the OVERALL_WINNER LED will remain unlit. N N 1 N 2 N 3 INVALID 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 Values for N1, N2, N3 For Part B only, you may use only the three basic logic gates (AND, OR, NOT) with maximum 2 inputs, as well as the more advanced counter, comparator, and DLATCH circuits (only those three ) from the Logisim circuit library. Note: F or Part B you will need to add a button that is pressed by yo u after the two card values (C1 and C2) have been entered. This is to avoid counting while you ar e adjusting the input pins for the C1 and C2 input pins (C1 - 1, C1 - 2, C1 - 3, C2 - 1, C2 - 2, and C2 - 3). 7611ICT ONLY ( This is not part of the 1007ICT assignment ) A dd a 6 th section to the end of your report with the title: “Additional requirement for 7611ICT” This extra section is required to be completed regardless of whether you chose to complete Part A or Part B and should be about 200 - 300 words in length. In this section, describe how you wo uld need to change the circuit if the Cards C1 and C2 were normal playing cards (instead of octal) . Normal playing cards have values ranging from 2 - 10, Jack, Queen, King, Ace , and Joker. Jack, Queen, King have a value of 10 . Ace has a value of 1. Joker has a value of 1. A win is still when C1 + C2 < 7.